Instruction Type Application

Instruction Type Application

a)

Instruction type : Non-Jump, R-type

Type                : R Type

Example           : add rd,rs,rt 

ALU Usage      :  1. PC update : No update beyond the normal increment.
                           2. Source operand fetch : source are rs and rt
                           3. ALU operation : Determined by the function ( fn ) field
                           4. Memory access : None
                           5. Register write : The result from the ALU is written to rd .

b)

Instruction type : Jump Register, R-type

Type                : R Type

Example           : jalr rd,rs 

ALU Usage      :  1. PC update : No update beyond the normal increment.
                           2. Source operand fetch :source are rs and rt
                           3. ALU operation : Determined by the function field
                           4. Memory access : None
                           5. Register write : The result from the ALU is written to rd .

c)

Instruction type : Immediate

Type                :  I Type

Example           : addi rt,rs,imn

ALU Usage      : 1. PC update : No update beyond the normal increment.
                          2. Source operand fetch : Source are rs and immediate field. For all instructions except sltiu                           ,the immediate field is sign extended . For sltiu , the immediate field is zero extended .
                         3. ALU operation : Determined by the opcode
                         4. Memory access : None.
                         5. Register write : The result from the ALU is written to rt .

d)

Instruction type : Branch

Type                :  I Type

Example           : beq $rs,$rt, imm

ALU Usage      : 1. PC update : If the branch condition is true , PC--PC + 4 + ( signed-extended immediate                              field ) << 2 .
                          2. Source operand fetch : Source are rs and rt
                          3. ALU operation : The source operands are subtracted for comparison .
                          4. Memory access : None.
                          5. Register write : None.

e)

Instruction type : Load

Type                :  I Type

Example           : Iw rt, imm(rs)

ALU Usage      : 1. PC update : No update beyond the normal increment
                          2. Source operand fetch : Source are rs and the sign extended immediate field
                          3. ALU operation : The two source operands are added to get the memory address .
                          4. Memory access : A memory read control signal is sent to memory . The result from the                                ALU is sent to memory as the address .
                          5. Register write : The data from memory is written to rt .

f)

Instruction type : Store

Type                :  I Type

Example           : sw rt,imm(rs)

ALU Usage      : 1. PC update : No update beyond the normal increment

                          2. Source operand fetch : Source are rs and the sign extended immediate field. rt register                                   also fetched.

                          3. ALU operation : Two source operand are added to get he memory address.

                          4. Memory access : A memory write control signal is sent to memory. The result is sent to                                 memory as the address. Content of rt are sent to memory as the write data.

                          5. Register write : None.

g) 

Instruction type : Register Jump

Type                :  R Type

Example           : beq $rs.$rt, imm

ALU Usage      : 1. PC update : jr and jalr    PC <-- rs

                          2. Source operand fetch : Only rs register.

                          3. ALU operation : None.

                          4. Memory access : None.

                          5. Register write : jr :     There is no register write                 

                                                      jalr :   rd<-- PC + 4

                           *For jalr, the incremented PC value must be capture the target address is placed into the                                PC. With edge-triggered clocking this is easy to do. There is an adder to produce the                                    PC+4 values. The PC does not change until the start of the next cycle, adder output will                                no change until the start of the next cycle.

h)

Instruction type : Non-Register Jump

Type                :  R Type

Example           :  jal target

ALU Usage      : 1. PC update : jr and jalr   PC <-- target address

                           * The target address is the concatenation of the high order 4 bits of PC+ . The target field                                 of the instruction and two 0 bits.

                          2. Source operand fetch : None

                          3. ALU opration : None.

                              Memory access : None

                              jr : There is no register write.

                              jal : ra <-- PC +4

                            *For jalr, the incremented PC value must be capture the target address is placed into the                                PC. With edge-triggered clocking this is easy to do. There is an adder to produce the                                    PC+4 values. The PC does not change until the start of the next cycle, adder output will                                no change until the start of the next cycle.